Saturday, May 30, 2020

COSMAC 2020 ELF Build (part 1)

Glue Logic Design

One of the first decisions that had to made was how to handle the glue logic.  When I fist started working on this many years ago, my idea was to use an ALTERA (Intel) MAX7000s CPLD.   This was one of the first in system programmable, inputs were 5V tolerant and the outputs could be made 5V CMOS compliant with a pull up resistor.  Well fast forward to 2020 and MAX7000S is only available in the excess inventory market.  Prices are not bad ($10-$30 each for 7128 in a TQFP100), but who knows what you are really getting. 

Why ALTERA (Intel)?  Mostly because it is what I am familiar with and the free software still has schematic entry.  Not motivated to learn VHDL at this point.  That could change, but not for now.  So I then moved onto more active parts, MAX II and MAX V.  Well MAX V was more than half the cost of MAX II and more recent.  So I started looking at this family first.  The CON to these families was limited package options.  BGA packages were out for two reasons, I cant solder these down and they drastically increase the PCB layer count and complexity.  So this left just two packages, EQFP64, TQFP100 and TQFP144. 

They way I partitioned the logic would require at least 3 TQFP100 packages. The EQFP64 just never had enough pins.  With common pins and interconnects eliminated, it would all fit in one TQFP144. Another MAX V advantage was part migration with in a package.  With a TQFP144, there were 4 different parts.  Using the middle part, 5M570Z, I have used 25% of the internal resources and 103 of 114 pins.  This gives a lot of flexibility for future improvements.  Having all the logic in one part is also useful, since only one change is needed.  Finally these parts come with 8KBits of FLASH.  I am going to look at how this might be mapped into I/O for configuration or storing nonvolatile data.

Now for the very big disadvantage to this family and every family after MAX7000S.  There is no simple 5V CMOS compatible interface.  The inputs are not 5V tolerant, a resistor and a diode are needed to prevent damage.  The outputs also need a diode and a resistor to produce a 5V CMOS compatible signal.  Not very enticing.  Looking at some commercial development boards on the market showed they were overcoming this by using 74LVC voltage translators (74LVC8T245, 74LVC1T45 and 74LVC2T45).

So after some soul searching, I have decide to go this way, a MAX V part and multiple voltage translators. Once I finish the design I will publish the higher level CPLD schematics to show how I did this.

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